Group Leader - Digital Imaging Processing

Responsibilities:

• Develop and maintain a world class digital FPGA and ASIC design team and developmental laboratory
• Provide technical leadership in image processing design and layout
• Develop synchronous pipelined architectures and efficient real time image processing algorithms for low-power portable applications
• Maintain an FPGA based rapid application development platform to prove real time camera operation with direct path to CMOS implementation and verification
• Assist operations group in production issues and IC foundry rules
• Provide prototype designs on schedule while working with other design groups to provide full camera on a chip integration
• Execute on multiple concurrent designs and test structure developments

Requirements:

• MSEE or PhD EE required
• Minimum of 10 years experience in a digital image processing development environment (preferably portable ASIC) including technical leadership
• Demonstrated innovation in leading edge vision systems and IP generation
• Good verbal and written English is required

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